On Fri, May 22, 2015 at 11:22:35AM +0300, Mika Kahola wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Rather that extracting the current cdclk freuqncy every time someone > wants to know it, cache the current value and use that. VLV/CHV already > stored a cached value there so just expand that to cover all platforms. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > v2: Rebased to the latest > v3: Rebased to the latest > > Reviewed-by: Mika Kahola <mika.kahola@xxxxxxxxx> > > Author: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 25 ++++++++++++++++++------- > static int valleyview_calc_cdclk(struct drm_i915_private *dev_priv, > @@ -5850,6 +5857,8 @@ static void valleyview_modeset_global_resources(struct drm_atomic_state *old_sta > > intel_display_power_put(dev_priv, POWER_DOMAIN_PIPE_A); > } > + > + intel_update_cdclk(dev); > } This ones looks like a spurious one to me. -- Damien _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
