Re: [PATCH v2] drm/i915/hsw: Fix workaround for server AUX channel clock divisor

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On Wed, 27 May 2015, jim.bride@xxxxxxxxxxxxxxx wrote:
> From: Jim Bride <jim.bride@xxxxxxxxxxxxxxx>
>
> According to the HSW b-spec we need to try clock divisors of 63
> and 72, each 3 or more times, when attempting DP AUX channel
> communication on a server chipset.  This actually wasn't happening
> due to a short-circuit that only checked the DP_AUX_CH_CTL_DONE bit
> in status rather than checking that the operation was done and
> that DP_AUX_CH_CTL_TIME_OUT_ERROR was not set.
>
> [v2] Implemented alternate solution suggested by Jani Nikula.
>
> Signed-off-by: Jim Bride <jim.bride@xxxxxxxxxxxxxxx>

Cc: stable@xxxxxxxxxxxxxxx
Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>

> ---
>  drivers/gpu/drm/i915/intel_dp.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 0edc305..7d1e024 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -893,10 +893,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
>  				continue;
>  			}
>  			if (status & DP_AUX_CH_CTL_DONE)
> -				break;
> +				goto done;
>  		}
> -		if (status & DP_AUX_CH_CTL_DONE)
> -			break;
>  	}
>  
>  	if ((status & DP_AUX_CH_CTL_DONE) == 0) {
> @@ -905,6 +903,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
>  		goto out;
>  	}
>  
> +done:
>  	/* Check for timeout or receive error.
>  	 * Timeouts occur when the sink is not connected
>  	 */
> -- 
> 1.9.1
>

-- 
Jani Nikula, Intel Open Source Technology Center
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