From: Jim Bride <jim.bride@xxxxxxxxxxxxxxx> According to the HSW b-spec we need to try clock divisors of 63 and 72, each 3 or more times, when attempting DP AUX channel communication on a server chipset. This actually wasn't happening due to a short-circuit that only checked the DP_AUX_CH_CTL_DONE bit in status rather than checking that the operation was done and that DP_AUX_CH_CTL_TIME_OUT_ERROR was not set. Signed-off-by: Jim Bride <jim.bride@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_dp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 0edc305..c01a3f9 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -895,7 +895,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, if (status & DP_AUX_CH_CTL_DONE) break; } - if (status & DP_AUX_CH_CTL_DONE) + if ((status & DP_AUX_CH_CTL_DONE) && + !(status & DP_AUX_CH_CTL_TIME_OUT_ERROR)) break; } -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
