This patch updates max supported scaler limits for NV12. Signed-off-by: Chandra Konduru <chandra.konduru@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_display.c | 12 ++++++++---- drivers/gpu/drm/i915/intel_drv.h | 3 ++- drivers/gpu/drm/i915/intel_sprite.c | 2 +- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1ad7d13..b7e4b3b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -13001,7 +13001,8 @@ intel_cleanup_plane_fb(struct drm_plane *plane, } int -skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state) +skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state, + uint32_t pixel_format) { int max_scale; struct drm_device *dev; @@ -13021,11 +13022,13 @@ skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state /* * skl max scale is lower of: - * close to 3 but not 3, -1 is for that purpose + * close to 2 or 3 (NV12: 2, other formats: 3) but not equal, + * -1 is for that purpose * or * cdclk/crtc_clock */ - max_scale = min((1 << 16) * 3 - 1, (1 << 8) * ((cdclk << 8) / crtc_clock)); + max_scale = min((1 << 16) * (pixel_format == DRM_FORMAT_NV12 ? 2 : 3) - 1, + (1 << 8) * ((cdclk << 8) / crtc_clock)); return max_scale; } @@ -13055,7 +13058,8 @@ intel_check_primary_plane(struct drm_plane *plane, if (INTEL_INFO(dev)->gen >= 9) { min_scale = 1; - max_scale = skl_max_scale(intel_crtc, crtc_state); + max_scale = skl_max_scale(intel_crtc, crtc_state, + fb ? fb->pixel_format :0); can_position = true; } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 754172f..aa77af7 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1139,7 +1139,8 @@ void skl_detach_scalers(struct intel_crtc *intel_crtc); int skl_update_scaler_users(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state, struct intel_plane *intel_plane, struct intel_plane_state *plane_state, int force_detach); -int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state); +int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, + uint32_t pixel_format); unsigned long intel_plane_obj_offset(struct intel_plane *intel_plane, struct drm_i915_gem_object *obj, diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 80ae21f..b2491ad 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -805,7 +805,7 @@ intel_check_sprite_plane(struct drm_plane *plane, if (INTEL_INFO(dev)->gen >= 9) { min_scale = 1; - max_scale = skl_max_scale(intel_crtc, crtc_state); + max_scale = skl_max_scale(intel_crtc, crtc_state, fb->pixel_format); } drm_rect_rotate(src, fb->width << 16, fb->height << 16, -- 1.7.9.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx