On 05/12/2015 12:49 PM, Chris Wilson wrote: > On Mon, May 11, 2015 at 12:01:11PM +0300, Abdiel Janulgue wrote: >> Ensures that the batch buffer is executed by the resource streamer >> >> Signed-off-by: Abdiel Janulgue <abdiel.janulgue@xxxxxxxxxxxxxxx> >> --- >> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++++++++++++++ >> drivers/gpu/drm/i915/intel_ringbuffer.h | 1 + >> include/uapi/drm/i915_drm.h | 7 ++++++- >> 3 files changed, 22 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c >> index a3190e79..afbd3c16 100644 >> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c >> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c >> @@ -1474,6 +1474,21 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, >> } else >> ring = &dev_priv->ring[(args->flags & I915_EXEC_RING_MASK) - 1]; >> >> + if (args->flags & I915_EXEC_RESOURCE_STREAMER) { >> + if (!IS_HASWELL(dev) && INTEL_INFO(dev)->gen < 8) { >> + DRM_DEBUG("RS is only allowed for Haswell, Gen8 " >> + "and above\n"); >> + return -EINVAL; >> + } >> + if (ring->id != RCS) { >> + DRM_DEBUG("RS is not available on %s)\n", >> + ring->name); >> + return -EINVAL; >> + } >> + >> + dispatch_flags |= I915_DISPATCH_RS; >> + } >> + >> if (!intel_ring_initialized(ring)) { > > Please don't split the conversion from args->flags to ring from its > subsequent EINVAL check. > -Chris > I'll include this change in the next version. _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx