Ville noticed in another patch we we didn't need them at all, so remove
them. It's worth saying that it makes no difference to code generated as
gcc is clever enough to optimize it out.
Suggested-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Signed-off-by: Damien Lespiau <damien.lespiau@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_display.c | 48 ++++++++++++++++--------------------
1 file changed, 21 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 23765d2..75ab299 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2953,20 +2953,18 @@ void skl_detach_scalers(struct intel_crtc *intel_crtc)
u32 skl_plane_ctl_format(uint32_t pixel_format)
{
- u32 format = 0;
-
switch (pixel_format) {
case DRM_FORMAT_C8:
- format = PLANE_CTL_FORMAT_INDEXED;
+ return PLANE_CTL_FORMAT_INDEXED;
break;
case DRM_FORMAT_RGB565:
- format = PLANE_CTL_FORMAT_RGB_565;
+ return PLANE_CTL_FORMAT_RGB_565;
break;
case DRM_FORMAT_XBGR8888:
- format = PLANE_CTL_FORMAT_XRGB_8888 | PLANE_CTL_ORDER_RGBX;
+ return PLANE_CTL_FORMAT_XRGB_8888 | PLANE_CTL_ORDER_RGBX;
break;
case DRM_FORMAT_XRGB8888:
- format = PLANE_CTL_FORMAT_XRGB_8888;
+ return PLANE_CTL_FORMAT_XRGB_8888;
break;
/*
* XXX: For ARBG/ABGR formats we default to expecting scanout buffers
@@ -2974,82 +2972,78 @@ u32 skl_plane_ctl_format(uint32_t pixel_format)
* DRM_FORMAT) for user-space to configure that.
*/
case DRM_FORMAT_ABGR8888:
- format = PLANE_CTL_FORMAT_XRGB_8888 | PLANE_CTL_ORDER_RGBX |
+ return PLANE_CTL_FORMAT_XRGB_8888 | PLANE_CTL_ORDER_RGBX |
PLANE_CTL_ALPHA_SW_PREMULTIPLY;
break;
case DRM_FORMAT_ARGB8888:
- format = PLANE_CTL_FORMAT_XRGB_8888 |
+ return PLANE_CTL_FORMAT_XRGB_8888 |
PLANE_CTL_ALPHA_SW_PREMULTIPLY;
break;
case DRM_FORMAT_XRGB2101010:
- format = PLANE_CTL_FORMAT_XRGB_2101010;
+ return PLANE_CTL_FORMAT_XRGB_2101010;
break;
case DRM_FORMAT_XBGR2101010:
- format = PLANE_CTL_ORDER_RGBX | PLANE_CTL_FORMAT_XRGB_2101010;
+ return PLANE_CTL_ORDER_RGBX | PLANE_CTL_FORMAT_XRGB_2101010;
break;
case DRM_FORMAT_YUYV:
- format = PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;
+ return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;
break;
case DRM_FORMAT_YVYU:
- format = PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YVYU;
+ return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YVYU;
break;
case DRM_FORMAT_UYVY:
- format = PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_UYVY;
+ return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_UYVY;
break;
case DRM_FORMAT_VYUY:
- format = PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
+ return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
break;
default:
MISSING_CASE(pixel_format);
}
- return format;
+ return 0;
}
u32 skl_plane_ctl_tiling(uint64_t fb_modifier)
{
- u32 plane_ctl_tiling = 0;
-
switch (fb_modifier) {
case DRM_FORMAT_MOD_NONE:
break;
case I915_FORMAT_MOD_X_TILED:
- plane_ctl_tiling = PLANE_CTL_TILED_X;
+ return PLANE_CTL_TILED_X;
break;
case I915_FORMAT_MOD_Y_TILED:
- plane_ctl_tiling = PLANE_CTL_TILED_Y;
+ return PLANE_CTL_TILED_Y;
break;
case I915_FORMAT_MOD_Yf_TILED:
- plane_ctl_tiling = PLANE_CTL_TILED_YF;
+ return PLANE_CTL_TILED_YF;
break;
default:
MISSING_CASE(fb_modifier);
}
- return plane_ctl_tiling;
+ return 0;
}
u32 skl_plane_ctl_rotation(unsigned int rotation)
{
- u32 plane_ctl_rotation = 0;
-
switch (rotation) {
case BIT(DRM_ROTATE_0):
break;
case BIT(DRM_ROTATE_90):
- plane_ctl_rotation = PLANE_CTL_ROTATE_90;
+ return PLANE_CTL_ROTATE_90;
break;
case BIT(DRM_ROTATE_180):
- plane_ctl_rotation = PLANE_CTL_ROTATE_180;
+ return PLANE_CTL_ROTATE_180;
break;
case BIT(DRM_ROTATE_270):
- plane_ctl_rotation = PLANE_CTL_ROTATE_270;
+ return PLANE_CTL_ROTATE_270;
break;
default:
MISSING_CASE(rotation);
}
- return plane_ctl_rotation;
+ return 0;
}
static void skylake_update_primary_plane(struct drm_crtc *crtc,
--
2.1.0
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