On Mon, May 11, 2015 at 02:35:47PM -0700, Chandra Konduru wrote: > During check_crtc_state, scaler_id mispatch is being reported for HSW. > This is applicable for skl+ and not for HSW. It is introduced by > commit id: > commit a1b2278e4dfcd2dbea85e319ebf73a6b7b2f180b > Author: Chandra Konduru <chandra.konduru@xxxxxxxxx> > Date: Tue Apr 7 15:28:45 2015 -0700 > > drm/i915: skylake panel fitting using shared scalers > > This patch will make sure that we leave scaler_id as 0 for platforms > before skl and set for skl+ only. This way scaler_id check during > check_crtc_state will pass for both prior to skl and skl+ platforms. > > v2: > -Leave scaler_id as 0 for gen < 9 (Daniel) > > Signed-off-by: Chandra Konduru <chandra.konduru@xxxxxxxxx> > References: http://lists.freedesktop.org/archives/intel-gfx/2015-May/065741.html Queued for -next, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/intel_display.c | 16 ++++++++++------ > 1 file changed, 10 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index c297cdc..5c9f358 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -9351,6 +9351,12 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, > } > > pfit_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe); > + > + if (INTEL_INFO(dev)->gen >= 9) { > + pipe_config->scaler_state.scaler_id = -1; > + pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX); > + } > + > if (intel_display_power_is_enabled(dev_priv, pfit_domain)) { > if (INTEL_INFO(dev)->gen == 9) > skylake_get_pfit_config(crtc, pipe_config); > @@ -9358,10 +9364,6 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, > ironlake_get_pfit_config(crtc, pipe_config); > else > MISSING_CASE(INTEL_INFO(dev)->gen); > - > - } else { > - pipe_config->scaler_state.scaler_id = -1; > - pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX); > } > > if (IS_HASWELL(dev)) > @@ -13248,8 +13250,8 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev, > primary->max_downscale = 1; > if (INTEL_INFO(dev)->gen >= 9) { > primary->can_scale = true; > + state->scaler_id = -1; > } > - state->scaler_id = -1; > primary->pipe = pipe; > primary->plane = pipe; > primary->check_plane = intel_check_primary_plane; > @@ -13431,7 +13433,6 @@ static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev, > cursor->max_downscale = 1; > cursor->pipe = pipe; > cursor->plane = pipe; > - state->scaler_id = -1; > cursor->check_plane = intel_check_cursor_plane; > cursor->commit_plane = intel_commit_cursor_plane; > cursor->disable_plane = intel_disable_cursor_plane; > @@ -13454,6 +13455,9 @@ static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev, > state->base.rotation); > } > > + if (INTEL_INFO(dev)->gen >=9) > + state->scaler_id = -1; > + > drm_plane_helper_add(&cursor->base, &intel_plane_helper_funcs); > > return &cursor->base; > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
