On Sat, May 09, 2015 at 02:05:55AM +0100, Damien Lespiau wrote:
> As we're doing throughout the code, being optimistic that platform n + 1
> will mostly reuse the same things as platform n allows us to minimize
> the enabling work needed.
>
> This time, it's about the number of WM levels.
>
> Signed-off-by: Damien Lespiau <damien.lespiau@xxxxxxxxx>
Queued for -next, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_pm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 7006f94..3271e4a 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1946,7 +1946,7 @@ static void intel_fixup_cur_wm_latency(struct drm_device *dev, uint16_t wm[5])
> int ilk_wm_max_level(const struct drm_device *dev)
> {
> /* how many WM levels are we expecting */
> - if (IS_GEN9(dev))
> + if (INTEL_INFO(dev)->gen >= 9)
> return 7;
> else if (IS_HASWELL(dev) || IS_BROADWELL(dev))
> return 4;
> --
> 2.1.0
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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