On Fri, May 08, 2015 at 06:23:45PM +0100, Damien Lespiau wrote: > On Mon, Apr 27, 2015 at 03:47:37PM -0700, Chandra Konduru wrote: > > Skylake nv12 format requires dbuf (aka. ddb) calculations > > and programming for each of y and uv sub-planes. Made minor > > changes to reuse current dbuf calculations and programming > > for uv plane. i.e., with this change, existing computation > > is used for either packed format or uv portion of nv12 > > depending on incoming format. Added new code for dbuf > > computation and programming for y plane. > > > > This patch is a pre-requisite for adding NV12 format support. > > Actual nv12 support is coming in later patches. > > > > Signed-off-by: Chandra Konduru <chandra.konduru@xxxxxxxxx> > > Talked with Chandra about the previous comments. The Y tiling problem I > was mentioning isn't quite part of NV12 and can be fixed on top of this. > I'll probaby try my suggestions and create a series on top of this > patch. > > Reviewed-by: Damien Lespiau <damien.lespiau@xxxxxxxxx> Oh and ofc: Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx