On to, 2015-05-07 at 12:00 +0530, Vandana Kannan wrote:
> Making lane stagger calculation common for HDMI and DP
>
> Signed-off-by: Vandana Kannan <vandana.kannan@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 21 +++++++++++----------
> 1 file changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 49b9fd8..144d544 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1386,16 +1386,6 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
> clk_div.m2_frac_en = clk_div.m2_frac != 0;
>
> vco = best_clock.vco;
> - if (clock > 270000)
> - clk_div.lanestagger = 0x18;
> - else if (clock > 135000)
> - clk_div.lanestagger = 0x0d;
> - else if (clock > 67000)
> - clk_div.lanestagger = 0x07;
> - else if (clock > 33000)
> - clk_div.lanestagger = 0x04;
> - else
> - clk_div.lanestagger = 0x02;
> } else if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT ||
> intel_encoder->type == INTEL_OUTPUT_EDP) {
> struct drm_encoder *encoder = &intel_encoder->base;
> @@ -1443,6 +1433,17 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
> return false;
> }
>
> + if (clock > 270000)
> + clk_div.lanestagger = 0x18;
> + else if (clock > 135000)
> + clk_div.lanestagger = 0x0d;
> + else if (clock > 67000)
> + clk_div.lanestagger = 0x07;
> + else if (clock > 33000)
> + clk_div.lanestagger = 0x04;
> + else
> + clk_div.lanestagger = 0x02;
> +
Here as in patch 1/2 we don't need to have fixed values for lanestagger
any more, so you can remove it from bxt_clk_div and use a local var
instead.
> crtc_state->dpll_hw_state.ebb0 =
> PORT_PLL_P1(clk_div.p1) | PORT_PLL_P2(clk_div.p2);
> crtc_state->dpll_hw_state.pll0 = clk_div.m2_int;
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