On Thu, Apr 16, 2015 at 09:45:01AM +0300, Imre Deak wrote: > On ke, 2015-04-15 at 16:52 -0700, Rodrigo Vivi wrote: > > From: Imre Deak <imre.deak@xxxxxxxxx> > > > > Due this typo we don't save/restore the GFX_MAX_REQ_COUNT register across > > suspend/resume, so fix this. > > > > This was introduced in > > > > commit ddeea5b0c36f3665446518c609be91f9336ef674 > > Author: Imre Deak <imre.deak@xxxxxxxxx> > > Date: Mon May 5 15:19:56 2014 +0300 > > > > drm/i915: vlv: add runtime PM support > > > > I noticed this only by reading the code. To my knowledge it shouldn't > > cause any real problems at the moment, since the power well backing this > > register remains on across a runtime s/r. This may change once > > system-wide s0ix functionality is enabled in the kernel. > > > > v2: > > - resend after a missing git add -u :/ > > > > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> > > Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@xxxxxxxxx) > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > > Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > [ http://lists.freedesktop.org/archives/intel-gfx/2015-March/062336.html ] Cc: stable@xxxxxxxxxxxxxxx I guess plus for Jani. -Daniel > > > --- > > drivers/gpu/drm/i915/i915_drv.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > > index c3fdbb0..e179da6 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.c > > +++ b/drivers/gpu/drm/i915/i915_drv.c > > @@ -1051,7 +1051,7 @@ static void vlv_save_gunit_s0ix_state(struct drm_i915_private *dev_priv) > > s->lra_limits[i] = I915_READ(GEN7_LRA_LIMITS_BASE + i * 4); > > > > s->media_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT); > > - s->gfx_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT); > > + s->gfx_max_req_count = I915_READ(GEN7_GFX_MAX_REQ_COUNT); > > > > s->render_hwsp = I915_READ(RENDER_HWS_PGA_GEN7); > > s->ecochk = I915_READ(GAM_ECOCHK); > > @@ -1133,7 +1133,7 @@ static void vlv_restore_gunit_s0ix_state(struct drm_i915_private *dev_priv) > > I915_WRITE(GEN7_LRA_LIMITS_BASE + i * 4, s->lra_limits[i]); > > > > I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->media_max_req_count); > > - I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->gfx_max_req_count); > > + I915_WRITE(GEN7_GFX_MAX_REQ_COUNT, s->gfx_max_req_count); > > > > I915_WRITE(RENDER_HWS_PGA_GEN7, s->render_hwsp); > > I915_WRITE(GAM_ECOCHK, s->ecochk); > > -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
