From: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx>
Broxton has the same panel fitter registers as Skylake.
v2:
- add MISSING_CASE for future platforms (daniel)
Signed-off-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx>
Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
Reviewed-by: Sagar Kamble <sagar.a.kamble@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_display.c | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5ee5d8c..11281f4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4881,10 +4881,12 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
intel_ddi_enable_pipe_clock(intel_crtc);
- if (IS_SKYLAKE(dev))
+ if (INTEL_INFO(dev)->gen == 9)
skylake_pfit_update(intel_crtc, 1);
- else
+ else if (INTEL_INFO(dev)->gen < 9)
ironlake_pfit_enable(intel_crtc);
+ else
+ MISSING_CASE(INTEL_INFO(dev)->gen);
/*
* On ILK+ LUT must be loaded before the pipe is running but with
@@ -5029,10 +5031,12 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);
- if (IS_SKYLAKE(dev))
+ if (INTEL_INFO(dev)->gen == 9)
skylake_pfit_update(intel_crtc, 0);
- else
+ else if (INTEL_INFO(dev)->gen < 9)
ironlake_pfit_disable(intel_crtc);
+ else
+ MISSING_CASE(INTEL_INFO(dev)->gen);
intel_ddi_disable_pipe_clock(intel_crtc);
@@ -9199,10 +9203,13 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
pfit_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
if (intel_display_power_is_enabled(dev_priv, pfit_domain)) {
- if (IS_SKYLAKE(dev))
+ if (INTEL_INFO(dev)->gen == 9)
skylake_get_pfit_config(crtc, pipe_config);
- else
+ else if (INTEL_INFO(dev)->gen < 9)
ironlake_get_pfit_config(crtc, pipe_config);
+ else
+ MISSING_CASE(INTEL_INFO(dev)->gen);
+
} else {
pipe_config->scaler_state.scaler_id = -1;
pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX);
--
2.1.0
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