On Mon, Apr 13, 2015 at 09:00:48PM +0200, Thomas Richter wrote: > Hi Daniel, hi Ville, > > some success at last. I couldn't stop myself playing with the NatSemi 2501 > DVO in my Fujitsu S6010 and I believe I finally got a hang on this chip. I > believe I understand now most of the undocumented registers. > > There are also a couple of additional features that are, apparently, not > used by the video BIOS of the S6010, namely the chip has a ditherer on board > - quite like the Intel Video Controller hub in the IBM R31. > Unfortunately, to enable the scaler, the bypass must be turned off, and > hence, parameters for a 1:1 through-mapping of the scaler are required. > > After quite some experimenting, I believe I found now the right settings to > enable the scaler and configure it to pass the 1024x768 input to the output. > > The chip is really a bit weird. It not only requires the scaling factors, > but also the input timings, (sync width, front/back porch for both > horizontal and vertical) and the output timing, and the configuration of its > PLL to sample the incoming data. Currently, most of the data I obtained by > "trail and error", at least for the 1024x768 mode in which the bios > configures the DVO in bypass mode. > > It turned out we forgot to configure a couple of registers (and some others > are pretty much blank). > > Thus, my question at this time is whether there is any interface how to get > the precise timing of the loaded video mode from the i915 module directly > instead of second-guessing the parameters, i.e. dimensions of the frame, > porch sizes, size of the sync pulses, pixel clock and so on. > > Other than that, I'll try to clean up the code I have to so far in the next > days and release it. In the mode structure that gets passed to your dvo driver look for the crtc_* values, those are the exact timings you need to set up. You want to look at the adjusted_mode since that's the one that actually gets sent to the dvo port, the other mode is the one userspace request and will get munged a bit. btw the sdvo code works really similar and also has input and output timings for the transcoder chip. You could peak at that code to see how it's all done. Cheers, Daniel PS: You're replies are still attached to some random thread, which makes them harder to spot and not miss ... -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
