On Fri, Apr 10, 2015 at 11:38:31AM +0300, Ander Conselvan de Oliveira wrote: > Since the following commit, the PLL calculations are done earlier, so > the code following the comment doesn't do anything PLL or encoder > related. It only updates the primary plane now. > > commit f3019a4d92f08b2dd92443a4b567a066a51c6ec0 > Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@xxxxxxxxx> > Date: Wed Oct 29 11:32:37 2014 +0200 > > drm/i915: Remove crtc_mode_set() hook > > Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@xxxxxxxxx> Queued for -next, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/intel_display.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 2263a71..894788d 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -11737,9 +11737,6 @@ static int __intel_set_mode(struct drm_crtc *crtc, > > modeset_update_crtc_power_domains(state); > > - /* Set up the DPLL and any encoders state that needs to adjust or depend > - * on the DPLL. > - */ > for_each_intel_crtc_masked(dev, modeset_pipes, intel_crtc) { > struct drm_plane *primary = intel_crtc->base.primary; > int vdisplay, hdisplay; > -- > 2.1.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx