On ke, 2015-04-08 at 14:04 +0100, Nick Hoath wrote: > On 17/03/2015 09:39, Imre Deak wrote: > > From: Ben Widawsky <benjamin.widawsky@xxxxxxxxx> > > > > Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx> > > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/i915_reg.h | 1 + > > drivers/gpu/drm/i915/intel_pm.c | 4 +++- > > 2 files changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index 3369a11..b7ba061 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -6104,6 +6104,7 @@ enum skl_disp_power_wells { > > #define GEN8_UCGCTL6 0x9430 > > #define GEN8_GAPSUNIT_CLOCK_GATE_DISABLE (1<<24) > > #define GEN8_SDEUNIT_CLOCK_GATE_DISABLE (1<<14) > > +#define GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ (1<<28) > > > > #define GEN6_GFXPAUSE 0xA000 > > #define GEN6_RPNSWREQ 0xA008 > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > > index d5dd0b3..52d3c02 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -103,10 +103,12 @@ static void bxt_init_clock_gating(struct drm_device *dev) > > /* > > * FIXME: > > * GEN8_SDEUNIT_CLOCK_GATE_DISABLE applies on A0 only. > > + * GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ applies on 3x6 GT SKUs only. > > */ > > /* WaDisableSDEUnitClockGating:bxt */ > > I can't find where WaDisableSDEUnitClockGating is listed as required for > BXT? It's specified in BSpec GEN8_UCGCTL6 (0x9430) as required for BXT A0. --Imre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx