On Thu, 19 Mar 2015, Mika Kahola <mika.kahola@xxxxxxxxx> wrote:
> This patch adds fast link training support if BDB version
> is equal or higher than 182 and the feature is supported
> in VBT.
Per what I heard, we can't reliably trust VBT on this. Let's err on the
safe side and leave this out.
BR,
Jani.
>
> Signed-off-by: Mika Kahola <mika.kahola@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_bios.c | 4 ++++
> drivers/gpu/drm/i915/intel_bios.h | 1 +
> drivers/gpu/drm/i915/intel_dp.c | 17 +++++++++++++++++
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> 5 files changed, 24 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index eb38cd1..f4e413e 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1349,6 +1349,7 @@ struct intel_vbt_data {
> bool edp_support;
> int edp_bpp;
> bool edp_low_vswing;
> + bool edp_flt_enabled;
> struct edp_power_seq edp_pps;
>
> struct {
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index c684085..8262195 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -669,6 +669,10 @@ parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
> vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
> dev_priv->vbt.edp_low_vswing = vswing == 0;
> }
> +
> + /* support for fast link training */
> + if (bdb->version >= 182)
> + dev_priv->vbt.edp_flt_enabled = (edp->edp_flt_enabled >> panel_type) & 0x1;
> }
>
> static void
> diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
> index 6afd5be..fad7ff7 100644
> --- a/drivers/gpu/drm/i915/intel_bios.h
> +++ b/drivers/gpu/drm/i915/intel_bios.h
> @@ -555,6 +555,7 @@ struct bdb_edp {
> u16 edp_s3d_feature;
> u16 edp_t3_optimization;
> u64 edp_vswing_preemph; /* v173 */
> + u16 edp_flt_enabled; /* v182 */
> } __packed;
>
> struct psr_table {
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 8f7720c..fbe97a9 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3472,7 +3472,20 @@ static bool
> intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP,
> uint8_t dp_train_pat)
> {
> + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> + struct drm_device *dev = intel_dig_port->base.base.dev;
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + int i;
> +
> memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
> +
> + /* eDP case */
> + if (intel_dp->edp_use_vbt_train_set && dev_priv->vbt.edp_flt_enabled) {
> + for (i = 0; i < intel_dp->lane_count; i++)
> + intel_dp->train_set[i] = dev_priv->vbt.edp_vswing |
> + dev_priv->vbt.edp_preemphasis;
> + }
> +
> intel_dp_set_signal_levels(intel_dp, DP);
> return intel_dp_set_link_train(intel_dp, DP, dp_train_pat);
> }
> @@ -3580,6 +3593,9 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
>
> DP |= DP_PORT_EN;
>
> + /* for eDP use link train set from VBT */
> + intel_dp->edp_use_vbt_train_set = is_edp(intel_dp);
> +
> /*
> * check if eDP has already trained. Reset voltage swing and
> * pre-emphasis levels if that's not the case.
> @@ -3624,6 +3640,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
> */
> if (intel_dp->link_trained) {
> DRM_DEBUG_KMS("clock recovery not ok, reset");
> + intel_dp->edp_use_vbt_train_set = false;
> if (!intel_dp_reset_link_train(intel_dp, &DP,
> DP_TRAINING_PATTERN_1 |
> DP_LINK_SCRAMBLING_DISABLE)) {
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index ba6eda1..fc692e3 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -673,6 +673,7 @@ struct intel_dp {
> int send_bytes,
> uint32_t aux_clock_divider);
> bool link_trained;
> + bool edp_use_vbt_train_set;
> };
>
> struct intel_digital_port {
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
