Since we will often pageflip to an active surface, we will often have to
wait for the surface to be written before issuing the flip. Also we are
likely to wait on that surface in plenty of time before the vblank.
Since we have a mechanism for boosting when a flip misses the expected
vblank, curtain the number of times we RPS boost when simply waiting for
mmioflip.
Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/i915_debugfs.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_display.c | 4 +++-
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 1 +
5 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index c8fe548af41d..dc5394032077 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2297,6 +2297,7 @@ static int i915_rps_boost_info(struct seq_file *m, void *data)
rcu_read_unlock();
}
seq_printf(m, "Semaphore boosts: %d\n", dev_priv->rps.semaphores.rps_boosts);
+ seq_printf(m, "MMIO flip boosts: %d\n", dev_priv->rps.mmioflips.rps_boosts);
seq_printf(m, "Kernel boosts: %d\n", dev_priv->rps.boosts);
mutex_unlock(&dev_priv->rps.hw_lock);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 057a1346e81f..8bb7e66dd4cd 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1064,6 +1064,7 @@ struct intel_gen6_power_mgmt {
unsigned boosts;
struct drm_i915_file_private semaphores;
+ struct drm_i915_file_private mmioflips;
/* manual wa residency calculations */
struct intel_rps_ei up_ei, down_ei;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 83785976aa85..0c2bb2ce04fc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10111,7 +10111,8 @@ static void intel_mmio_flip_work_func(struct work_struct *work)
if (mmio_flip->rq)
WARN_ON(__i915_wait_request(mmio_flip->rq,
mmio_flip->crtc->reset_counter,
- false, NULL, NULL));
+ false, NULL,
+ &mmio_flip->i915->rps.mmioflips));
intel_do_mmio_flip(mmio_flip->crtc);
@@ -10132,6 +10133,7 @@ static int intel_queue_mmio_flip(struct drm_device *dev,
if (mmio_flip == NULL)
return -ENOMEM;
+ mmio_flip->i915 = to_i915(dev);
mmio_flip->rq = i915_gem_request_reference(obj->last_write_req);
mmio_flip->crtc = to_intel_crtc(crtc);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 6163be8be812..160f6a28e9a1 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -404,6 +404,7 @@ struct intel_pipe_wm {
struct intel_mmio_flip {
struct work_struct work;
+ struct drm_i915_private *i915;
struct drm_i915_gem_request *rq;
struct intel_crtc *crtc;
};
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 3e274cf3adaa..17092897c728 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6828,6 +6828,7 @@ void intel_pm_setup(struct drm_device *dev)
intel_gen6_powersave_work);
INIT_LIST_HEAD(&dev_priv->rps.clients);
INIT_LIST_HEAD(&dev_priv->rps.semaphores.rps_boost);
+ INIT_LIST_HEAD(&dev_priv->rps.mmioflips.rps_boost);
dev_priv->pm.suspended = false;
}
--
2.1.4
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