2015-04-06 23:09 GMT-03:00 Todd Previte <tprevite@xxxxxxxxx>:
> The Displayport Link Layer Compliance Testing Specification 1.2 rev 1.1
> specifies that repeated AUX transactions after a failure (no response /
> invalid response) must have a minimum delay of 400us before the resend can
> occur. Tests 4.2.1.1 and 4.2.1.2 are two tests that require this specifically.
>
> Also, the check for DP_AUX_CH_CTL_TIME_OUT_ERROR has been moved out into a
> separate case. As of now, the only action taken is to log the error, since
> the HW will have already waited the required amount of time for the
> transaction to complete.
As of V6, this paragraph is no longer true. We could just remove it
while applying.
With that: Reviewed-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>.
>
> V2:
> - Changed udelay() to usleep_range()
> V3:
> - Removed extraneous check for timeout
> - Updated comment to reflect this change
> V4:
> - Reformatted a comment
> V5:
> - Added separate check for HW timeout on AUX transactions. A message
> is logged upon detection of this case.
> V6:
> - Add continue statement to HW timeout detect case
> - Remove the log message indicating a timeout has been
> detected (review feedback)
>
> Signed-off-by: Todd Previte <tprevite@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 13 +++++++++++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index ed2f60c..8b59458 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -877,9 +877,18 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
> DP_AUX_CH_CTL_TIME_OUT_ERROR |
> DP_AUX_CH_CTL_RECEIVE_ERROR);
>
> - if (status & (DP_AUX_CH_CTL_TIME_OUT_ERROR |
> - DP_AUX_CH_CTL_RECEIVE_ERROR))
> + if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR)
> continue;
> +
> + /* DP CTS 1.2 Core Rev 1.1, 4.2.1.1 & 4.2.1.2
> + * 400us delay required for errors and timeouts
> + * Timeout errors from the HW already meet this
> + * requirement so skip to next iteration
> + */
> + if (status & DP_AUX_CH_CTL_RECEIVE_ERROR) {
> + usleep_range(400, 500);
> + continue;
> + }
> if (status & DP_AUX_CH_CTL_DONE)
> break;
> }
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Paulo Zanoni
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
