On Tue, Apr 07, 2015 at 11:12:09AM +0100, Chris Wilson wrote: > On Tue, Apr 07, 2015 at 11:07:07AM +0200, Daniel Vetter wrote: > > On Tue, Apr 07, 2015 at 09:36:37AM +0100, Chris Wilson wrote: > > > On Tue, Apr 07, 2015 at 10:10:25AM +0200, Daniel Vetter wrote: > > > > On Thu, Apr 02, 2015 at 12:15:13AM +0100, Chris Wilson wrote: > > > > > On Wed, Apr 01, 2015 at 07:40:59PM -0300, Paulo Zanoni wrote: > > > > > > +static void draw_rect_mmap_wc(int fd, struct buf_data *buf, struct rect *rect, > > > > > > + uint32_t color) > > > > > > +{ > > > > > > + uint32_t *ptr; > > > > > > + uint32_t tiling, swizzle; > > > > > > + > > > > > > + gem_get_tiling(fd, buf->handle, &tiling, &swizzle); > > > > > > + > > > > > > + /* We didn't implement suport for the older tiling methods yet. */ > > > > > > + if (tiling != I915_TILING_NONE) > > > > > > + igt_require(intel_gen(intel_get_drm_devid(fd)) >= 5); > > > > > > > > > > But you now do! You need something like: > > > > > > > > The problem is that the kernel hides bit17 swizzling. I chatted with Paulo > > > > on irc about this and we decided just ignore them all is the simplest > > > > approach. > > > > > > Urm, that was the whole point of GET_TILING v2. That small function is > > > all you need to determine when bit17 is in effect and then you get to > > > reuse all the direct CPU methods (as they are also used by userspace) > > > for earlier gen. > > > > Oh right completely forgot that we've added this. But imo can be added on > > top once we need it (it's not just gen2 but also some gen3 which need > > different tile dimensions). > > Tile size is 2048 for gen2 only right. Tile width is the same for all > gen3 for tiling X (and gen2), but tiling Y width depends on subgen. > Right? > > Just need to check because I have code that depends on this... Oh right thought about Y tiling which changes on gen3. X tiling matches your description afaik - I consider gem_tiled_pread the authoritative source for this stuff. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx