On Wed, Apr 01, 2015 at 06:41:32PM +0300, Ville Syrjälä wrote: > On Tue, Mar 31, 2015 at 04:03:21PM -0700, Rodrigo Vivi wrote: > > Program the default initial value of the L3SqcReg1 on BDW for performance > > > > v2: Default confirmed and using intel_ring_emit_wa as Mika pointed out. > > > > v3: Spec shows now a different value. It tells us to set to 0x784000 > > instead the 0x610000 that is there already. > > Also rebased after a long time so using WA_WRITE now. > > > > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > > Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
