Now that we are "extracting" the cdclk frequency on ILK-IVB we
can also simplify ilk_get_aux_clock_divider() to calculate the
divider based on cdclk instead of hardcoding the values.
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Signed-off-by: Mika Kahola <mika.kahola@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_dp.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 9b741b5..e38dbd5 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -696,15 +696,13 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
{
struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
struct drm_device *dev = intel_dig_port->base.base.dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
if (index)
return 0;
if (intel_dig_port->port == PORT_A) {
- if (IS_GEN6(dev) || IS_GEN7(dev))
- return 200; /* SNB & IVB eDP input clock at 400Mhz */
- else
- return 225; /* eDP input clock at 450Mhz */
+ return DIV_ROUND_UP(dev_priv->display.get_display_clock_speed(dev), 2000);
} else {
return DIV_ROUND_UP(intel_pch_rawclk(dev), 2);
}
--
1.9.1
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