On Mon, Mar 30, 2015 at 01:07:21PM +0300, Ville Syrjälä wrote:
> On Sat, Mar 28, 2015 at 03:23:34PM +0530, deepak.s@xxxxxxxxxxxxxxx wrote:
> > From: Deepak S <deepak.s@xxxxxxxxxxxxxxx>
> >
> > On CHV, PUNIT team confirmed that 'VLV_GFX_CLK_STATUS_BIT' is not a
> > sticky bit and it will always be set. So ignore Check for previous
> > Gfx force off during suspend and allow the force clk as part S0ix
> > Sequence
> >
> > Signed-off-by: Deepak S <deepak.s@xxxxxxxxxxxxxxx>
>
> Yeah seems OK. We still do the "allow wake" dance even though we skip
> the gunit register save, so I guess the force gfx clock makes sense as
> part of that.
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Queued for -next, thanks for the patch.
-Daniel
>
> > ---
> > drivers/gpu/drm/i915/i915_drv.c | 6 ++++--
> > 1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > index 82f8be4..182d6a7 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -1194,11 +1194,13 @@ int vlv_force_gfx_clock(struct drm_i915_private *dev_priv, bool force_on)
> > int err;
> >
> > val = I915_READ(VLV_GTLC_SURVIVABILITY_REG);
> > - WARN_ON(!!(val & VLV_GFX_CLK_FORCE_ON_BIT) == force_on);
> >
> > #define COND (I915_READ(VLV_GTLC_SURVIVABILITY_REG) & VLV_GFX_CLK_STATUS_BIT)
> > /* Wait for a previous force-off to settle */
> > - if (force_on) {
> > + if (force_on && !IS_CHERRYVIEW(dev_priv->dev)) {
> > + /* WARN_ON only for the Valleyview */
> > + WARN_ON(!!(val & VLV_GFX_CLK_FORCE_ON_BIT) == force_on);
> > +
> > err = wait_for(!COND, 20);
> > if (err) {
> > DRM_ERROR("timeout waiting for GFX clock force-off (%08x)\n",
> > --
> > 1.9.1
>
> --
> Ville Syrjälä
> Intel OTC
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> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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