+static int bxt_suspend_complete(struct drm_i915_private *dev_priv)
+{
+ struct drm_device *dev = dev_priv->dev;
+
+ /* TODO: when DC5 support is added disable DC5 here. */
+
+ bxt_uninit_cdclk(dev);
+ bxt_enable_dc9(dev_priv);
+
+ return 0;
+}
+
static int hsw_suspend_complete(struct drm_i915_private *dev_priv)
{
hsw_enable_pc8(dev_priv);
@@ -1009,6 +1021,20 @@ static int hsw_suspend_complete(struct
drm_i915_private *dev_priv)
return 0;
}
+static int bxt_resume_prepare(struct drm_i915_private *dev_priv)
+{
+ struct drm_device *dev = dev_priv->dev;
+
+ /* TODO: When CSR FW support is added make sure the FW is loaded. */
+
+ bxt_disable_dc9(dev_priv);
Kindly add below comment as well:
/* TODO: when DC5 support is added enable DC5 here if conditions are
met. */
+ bxt_init_cdclk(dev);
+ bxt_ddi_phy_init(dev);
+ intel_prepare_ddi(dev);
+
+ return 0;
+}
+
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