On Wednesday 25 March 2015 12:42 AM, Rodrigo Vivi wrote:
Let's pre-compute it on pipe_config compute to let it exported there but also
to use to see if we can enable DRRS.
Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_display.c | 35 +++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_drv.h | 2 ++
drivers/gpu/drm/i915/intel_psr.c | 19 +++++--------------
3 files changed, 42 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 35cdb48..91dd7bf 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5750,6 +5750,38 @@ retry:
return setup_ok ? 0 : -EINVAL;
}
+static void intel_compute_psr_config(struct intel_crtc *crtc,
+ struct intel_crtc_state *pipe_config)
+{
+ struct drm_device *dev = crtc->base.dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct intel_encoder *intel_encoder;
+ struct intel_digital_port *dig_port;
+
+ pipe_config->psr_enabled = false;
+
+ if (!HAS_PSR(dev)) {
+ DRM_DEBUG_KMS("PSR not supported on this platform\n");
+ return;
+ }
+
+ for_each_encoder_on_crtc(dev, &crtc->base, intel_encoder)
+ if (intel_encoder->type == INTEL_OUTPUT_EDP)
+ break;
+
+ if (intel_encoder->type != INTEL_OUTPUT_EDP)
+ return;
+
+ if (!dev_priv->psr.sink_support) {
+ DRM_DEBUG_KMS("PSR not supported by this panel\n");
+ return;
+ }
+
+ dig_port = enc_to_dig_port(&intel_encoder->base);
+
+ pipe_config->psr_enabled = intel_psr_match_conditions(dig_port);
+}
+
static void hsw_compute_ips_config(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config)
{
@@ -5812,6 +5844,8 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
pipe_config->pipe_bpp = 8*3;
}
+ intel_compute_psr_config(crtc, pipe_config);
+
if (HAS_IPS(dev))
hsw_compute_ips_config(crtc, pipe_config);
@@ -10367,6 +10401,7 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
pipe_config->pch_pfit.pos,
pipe_config->pch_pfit.size,
pipe_config->pch_pfit.enabled ? "enabled" : "disabled");
+ DRM_DEBUG_KMS("psr: %i\n", pipe_config->psr_enabled);
DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled);
DRM_DEBUG_KMS("double wide: %i\n", pipe_config->double_wide);
}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index c0fa1cb..d79852f 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -384,6 +384,7 @@ struct intel_crtc_state {
int fdi_lanes;
struct intel_link_m_n fdi_m_n;
+ bool psr_enabled;
flag is indicating the status of the PSR capability of PSR source and
sink, not the status of PSR enabling.
Naming is misleading?
bool ips_enabled;
bool double_wide;
@@ -1206,6 +1207,7 @@ void intel_backlight_unregister(struct drm_device *dev);
/* intel_psr.c */
+bool intel_psr_match_conditions(struct intel_digital_port *dig_port);
void intel_psr_enable(struct intel_dp *intel_dp);
void intel_psr_disable(struct intel_dp *intel_dp);
void intel_psr_invalidate(struct drm_device *dev,
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index c1ca923..34854af 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -249,15 +249,13 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp)
EDP_PSR_ENABLE);
}
-static bool intel_psr_match_conditions(struct intel_dp *intel_dp)
+bool intel_psr_match_conditions(struct intel_digital_port *dig_port)
{
- struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
struct drm_device *dev = dig_port->base.base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_crtc *crtc = dig_port->base.base.crtc;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- lockdep_assert_held(&dev_priv->psr.lock);
WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
@@ -296,6 +294,7 @@ static bool intel_psr_match_conditions(struct intel_dp *intel_dp)
return true;
}
+
static void intel_psr_activate(struct intel_dp *intel_dp)
{
struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
@@ -330,16 +329,11 @@ void intel_psr_enable(struct intel_dp *intel_dp)
struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
struct drm_device *dev = intel_dig_port->base.base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
+ struct intel_crtc *intel_crtc =
+ to_intel_crtc(intel_dig_port->base.base.crtc);
- if (!HAS_PSR(dev)) {
- DRM_DEBUG_KMS("PSR not supported on this platform\n");
- return;
- }
-
- if (!is_edp_psr(intel_dp)) {
- DRM_DEBUG_KMS("PSR not supported by this panel\n");
+ if (!intel_crtc->config->psr_enabled)
return;
- }
mutex_lock(&dev_priv->psr.lock);
if (dev_priv->psr.enabled) {
@@ -347,9 +341,6 @@ void intel_psr_enable(struct intel_dp *intel_dp)
goto unlock;
}
- if (!intel_psr_match_conditions(intel_dp))
- goto unlock;
-
dev_priv->psr.busy_frontbuffer_bits = 0;
if (HAS_DDI(dev)) {
--
Ram
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
