Re: [PATCH] drm/i915: PSR: Fix DP_PSR_NO_TRAIN_ON_EXIT logic

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Hi Durga, are you ok with this one?

Hi Art, do you believe there is any risk of avoiding TP when panel
tells DP_PSR_NO_TRAIN_ON_EXIT and link is disabled? I believe on the
other discussion we conluded that DP_PSR_NO_TRAIN_ON_EXIT was only
responsible for TP configurations regardless links standby or not,
right?

Thanks,
Rodrigo.

On Mon, Mar 16, 2015 at 10:35 AM, Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> wrote:
> Since the begining there is a missunderstanding on the meaning of this
> dpcd bit.
> This bit shouldn't indicate whether to use link standby or not, but just
> be used to configure TP1, TP2 and TP3 times and tell hw aux should be skiped
> since HW is the responsible one.
>
> Even with help of frontbuffer tracking, HW is still fully responsible for
> PSR exit logic with/without DP training.
>
> v2: Fix and improve commit message (Durga).
>
> Cc: Durgadoss R <durgadoss.r@xxxxxxxxx>
> Cc: Arthur Runyan <arthur.j.runyan@xxxxxxxxx>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> ---
>  drivers/gpu/drm/i915/intel_psr.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index 2e6831d..6c8e9e0 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -242,8 +242,10 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp)
>         uint32_t val = 0x0;
>         const uint32_t link_entry_time = EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;
>
> -       if (dev_priv->psr.link_standby) {
> +       if (dev_priv->psr.link_standby)
>                 val |= EDP_PSR_LINK_STANDBY;
> +
> +       if (intel_dp->psr_dpcd[1] & DP_PSR_NO_TRAIN_ON_EXIT) {
>                 val |= EDP_PSR_TP2_TP3_TIME_0us;
>                 val |= EDP_PSR_TP1_TIME_0us;
>                 val |= EDP_PSR_SKIP_AUX_EXIT;
> @@ -354,8 +356,7 @@ void intel_psr_enable(struct intel_dp *intel_dp)
>         /* First we check VBT, but we must respect sink and source
>          * known restrictions */
>         dev_priv->psr.link_standby = dev_priv->vbt.psr.full_link;
> -       if ((intel_dp->psr_dpcd[1] & DP_PSR_NO_TRAIN_ON_EXIT) ||
> -           (IS_BROADWELL(dev) && intel_dig_port->port != PORT_A))
> +       if (IS_BROADWELL(dev) && intel_dig_port->port != PORT_A)
>                 dev_priv->psr.link_standby = true;
>
>         dev_priv->psr.busy_frontbuffer_bits = 0;
> --
> 2.1.0
>
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> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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