On ma, 2015-03-23 at 11:10 +0000, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > > To support frame buffer rotation we need to be able to pass on the information > on what kind of GGTT view is required for display. > > This patch just adds the parameter and makes all the callers default to the > normal view. > > v2: Rebased for ggtt view changes. > v3: Don't limit PIN_MAPPABLE to normal views just yet. (Joonas Lahtinen) > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> (v3) > --- > drivers/gpu/drm/i915/i915_drv.h | 14 +++++++++++--- > drivers/gpu/drm/i915/i915_gem.c | 20 ++++++++++++-------- > drivers/gpu/drm/i915/intel_display.c | 7 ++++--- > drivers/gpu/drm/i915/intel_overlay.c | 3 ++- > 4 files changed, 29 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index eb38cd1..e7ed5b3 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2765,8 +2765,10 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write); > int __must_check > i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj, > u32 alignment, > - struct intel_engine_cs *pipelined); > -void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj); > + struct intel_engine_cs *pipelined, > + const struct i915_ggtt_view *view); > +void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj, > + const struct i915_ggtt_view *view); > int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj, > int align); > int i915_gem_open(struct drm_device *dev, struct drm_file *file); > @@ -2875,7 +2877,13 @@ i915_gem_object_ggtt_unbind(struct drm_i915_gem_object *obj) > return i915_vma_unbind(i915_gem_obj_to_ggtt(obj)); > } > > -void i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj); > +void i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj, > + const struct i915_ggtt_view *view); > +static inline void > +i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj) > +{ > + i915_gem_object_ggtt_unpin_view(obj, &i915_ggtt_view_normal); > +} > > /* i915_gem_context.c */ > int __must_check i915_gem_context_init(struct drm_device *dev); > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 84e2a23..73b2638 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -3871,7 +3871,8 @@ static bool is_pin_display(struct drm_i915_gem_object *obj) > int > i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj, > u32 alignment, > - struct intel_engine_cs *pipelined) > + struct intel_engine_cs *pipelined, > + const struct i915_ggtt_view *view) > { > u32 old_read_domains, old_write_domain; > bool was_pin_display; > @@ -3907,7 +3908,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj, > * (e.g. libkms for the bootup splash), we have to ensure that we > * always use map_and_fenceable for all scanout buffers. > */ > - ret = i915_gem_obj_ggtt_pin(obj, alignment, PIN_MAPPABLE); > + ret = i915_gem_object_ggtt_pin(obj, view, alignment, PIN_MAPPABLE); > if (ret) > goto err_unpin_display; > > @@ -3935,9 +3936,11 @@ err_unpin_display: > } > > void > -i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj) > +i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj, > + const struct i915_ggtt_view *view) > { > - i915_gem_object_ggtt_unpin(obj); > + i915_gem_object_ggtt_unpin_view(obj, view); > + > obj->pin_display = is_pin_display(obj); > } > > @@ -4214,15 +4217,16 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj, > } > > void > -i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj) > +i915_gem_object_ggtt_unpin_view(struct drm_i915_gem_object *obj, > + const struct i915_ggtt_view *view) > { > - struct i915_vma *vma = i915_gem_obj_to_ggtt(obj); > + struct i915_vma *vma = i915_gem_obj_to_ggtt_view(obj, view); > > BUG_ON(!vma); > BUG_ON(vma->pin_count == 0); > - BUG_ON(!i915_gem_obj_ggtt_bound(obj)); > + BUG_ON(!i915_gem_obj_ggtt_bound_view(obj, view->type)); > > - if (--vma->pin_count == 0) > + if (--vma->pin_count == 0 && view->type == I915_GGTT_VIEW_NORMAL) > obj->pin_mappable = false; > } > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 3b9ce89..39380f4 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2350,7 +2350,8 @@ intel_pin_and_fence_fb_obj(struct drm_plane *plane, > intel_runtime_pm_get(dev_priv); > > dev_priv->mm.interruptible = false; > - ret = i915_gem_object_pin_to_display_plane(obj, alignment, pipelined); > + ret = i915_gem_object_pin_to_display_plane(obj, alignment, pipelined, > + &i915_ggtt_view_normal); > if (ret) > goto err_interruptible; > > @@ -2370,7 +2371,7 @@ intel_pin_and_fence_fb_obj(struct drm_plane *plane, > return 0; > > err_unpin: > - i915_gem_object_unpin_from_display_plane(obj); > + i915_gem_object_unpin_from_display_plane(obj, &i915_ggtt_view_normal); > err_interruptible: > dev_priv->mm.interruptible = true; > intel_runtime_pm_put(dev_priv); > @@ -2382,7 +2383,7 @@ static void intel_unpin_fb_obj(struct drm_i915_gem_object *obj) > WARN_ON(!mutex_is_locked(&obj->base.dev->struct_mutex)); > > i915_gem_object_unpin_fence(obj); > - i915_gem_object_unpin_from_display_plane(obj); > + i915_gem_object_unpin_from_display_plane(obj, &i915_ggtt_view_normal); > } > > /* Computes the linear offset to the base tile and adjusts x, y. bytes per pixel > diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c > index 823d1d9..dd92122 100644 > --- a/drivers/gpu/drm/i915/intel_overlay.c > +++ b/drivers/gpu/drm/i915/intel_overlay.c > @@ -720,7 +720,8 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, > if (ret != 0) > return ret; > > - ret = i915_gem_object_pin_to_display_plane(new_bo, 0, NULL); > + ret = i915_gem_object_pin_to_display_plane(new_bo, 0, NULL, > + &i915_ggtt_view_normal); > if (ret != 0) > return ret; > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx