On Fri, 2015-03-20 at 09:05 +0000, Nick Hoath wrote:
> On 17/03/2015 09:39, Imre Deak wrote:
> > From: Ben Widawsky <benjamin.widawsky@xxxxxxxxx>
> >
> > Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx>
> > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 4 ++++
> > drivers/gpu/drm/i915/intel_ringbuffer.c | 9 +++++++++
> > 2 files changed, 13 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index b7ba061..1d074e8 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -5346,6 +5346,10 @@ enum skl_disp_power_wells {
> > #define HDC_FORCE_NON_COHERENT (1<<4)
> > #define HDC_BARRIER_PERFORMANCE_DISABLE (1<<10)
> >
> > +/* GEN9 chicken */
> > +#define SLICE_ECO_CHICKEN0 0x7308
> > +#define PIXEL_MASK_CAMMING_DISABLE (1 << 14)
> > +
> > /* WaCatErrorRejectionIssue */
> > #define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030
> > #define GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB (1<<11)
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index abe062a..e23cbdc 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -966,6 +966,15 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
> > WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5,
> > GEN9_CCS_TLB_PREFETCH_ENABLE);
> >
> > + /*
> > + * FIXME: don't apply the following on BXT for stepping C. On BXT A0
> > + * the flag reads back as 0.
> > + */
>
> I've just posted a patch with the stepping macros. You can use these in
> the same way as for Skylake.
I'm not so happy to make these changes at this point. Without them we
still have a correct - even if conservative - behavior on other
steppings. There are quite a few places marked with FIXME that need
improvement in a similar way and I'd leave them as-is for now to keep as
close as possible to the good known working state (as of the power-on)
and to make merging of this initial patchset fast.
>
> > + /* WaDisableMaskBasedCammingInRCC:bxtA */
> > + if (IS_BROXTON(dev))
> > + WA_SET_BIT_MASKED(SLICE_ECO_CHICKEN0,
> > + PIXEL_MASK_CAMMING_DISABLE);
> > +
> > return 0;
> > }
> >
> >
>
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