On Tue, Mar 17, 2015 at 11:39:36AM +0200, Imre Deak wrote:
> On Broxton per specification the GTT has to be mapped as uncached.
> This was caught by the PTE write readback warning, which showed a
> corrupted PTE value with using the current write-combine mapping.
>
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 4311292..8edf3cf 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2065,7 +2065,10 @@ static int ggtt_probe_common(struct drm_device *dev,
> gtt_phys_addr = pci_resource_start(dev->pdev, 0) +
> (pci_resource_len(dev->pdev, 0) / 2);
>
> - dev_priv->gtt.gsm = ioremap_wc(gtt_phys_addr, gtt_size);
> + if (IS_BROXTON(dev))
> + dev_priv->gtt.gsm = ioremap_nocache(gtt_phys_addr, gtt_size);
This one sucks badly. Do we have a w/a name assigned to this, hsd filed
and some commit that this will be fixed in later revisions?
-Daniel
> + else
> + dev_priv->gtt.gsm = ioremap_wc(gtt_phys_addr, gtt_size);
> if (!dev_priv->gtt.gsm) {
> DRM_ERROR("Failed to map the gtt page table\n");
> return -ENOMEM;
> --
> 2.1.0
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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