From: Shashank Sharma <shashank.sharma@xxxxxxxxx> This patch adds conditional checks in gen8_irq functions to support BXT. Most of the checks just look for PCH split availability, and block the call to PCH interrupt functions if not available. Reviewed-by: Satheeshakrishna M <satheeshakrishna.m@xxxxxxxxx> Signed-off-by: Damien Lespiau <damien.lespiau@xxxxxxxxx> Signed-off-by: Shashank Sharma <ppashank.sharma@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_irq.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 4a2f85b..3b82eb2 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2372,7 +2372,13 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg) DRM_ERROR("The master control interrupt lied (DE PIPE)!\n"); } - if (!HAS_PCH_NOP(dev) && master_ctl & GEN8_DE_PCH_IRQ) { + /* + * Todo: BXT doesnt have a PCH, so GEN8_DE_PCH_IRQ shouldn't + * be set. But until this part is confirmed, going paranoid, and adding + * a IS_BROXTON check here. + */ + if (!IS_BROXTON(dev) && !HAS_PCH_NOP(dev) && + master_ctl & GEN8_DE_PCH_IRQ) { /* * FIXME(BDW): Assume for now that the new interrupt handling * scheme also closed the SDE interrupt handling race we've seen @@ -3096,7 +3102,7 @@ static void ibx_irq_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - if (HAS_PCH_NOP(dev)) + if (HAS_PCH_NOP(dev) || !HAS_PCH_SPLIT(dev)) return; GEN5_IRQ_RESET(SDE); @@ -3117,7 +3123,7 @@ static void ibx_irq_pre_postinstall(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - if (HAS_PCH_NOP(dev)) + if (HAS_PCH_NOP(dev) || !HAS_PCH_SPLIT(dev)) return; WARN_ON(I915_READ(SDEIER) != 0); @@ -3325,7 +3331,7 @@ static void ibx_irq_postinstall(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; u32 mask; - if (HAS_PCH_NOP(dev)) + if (HAS_PCH_NOP(dev) || !HAS_PCH_SPLIT(dev)) return; if (HAS_PCH_IBX(dev)) -- 2.1.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx