On Mon, Mar 16, 2015 at 03:46:35PM +0200, Mika Kuoppala wrote: > From: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > On Sandybridge+, the GPU provides the ERROR register for detecting page > faults. Hook this up to our hangcheck so that we can dump the error > state soon after such an event occurs. This would be better inside an > interrupt handler, but it serves a purpose here as it detects that our > initial context setup is invalid... > > Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_irq.c | 5 +++++ > drivers/gpu/drm/i915/intel_uncore.c | 2 ++ > 2 files changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 49ad5fb..ea668fc 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -2929,6 +2929,11 @@ static void i915_hangcheck_elapsed(struct work_struct *work) > if (!i915.enable_hangcheck) > return; > > + if (INTEL_INFO(dev_priv)->gen >= 6 && I915_READ(ERROR_GEN6)) { > + i915_handle_error(dev, false, "GPU reported a page fault"); > + I915_WRITE(ERROR_GEN6, 0); Shouldn't we also at least report the bits from the ERROR register somewhere? Or are they supremely useless? -Daniel > + } > + > for_each_ring(ring, dev_priv, i) { > u64 acthd; > u32 seqno; > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index ab5cc94..c58535e 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -359,6 +359,8 @@ static void __intel_uncore_early_sanitize(struct drm_device *dev, > if (IS_GEN6(dev) || IS_GEN7(dev)) > __raw_i915_write32(dev_priv, GTFIFODBG, > __raw_i915_read32(dev_priv, GTFIFODBG)); > + if (INTEL_INFO(dev)->gen >= 6) > + __raw_i915_write32(dev_priv, ERROR_GEN6, 0); > > intel_uncore_forcewake_reset(dev, restore_forcewake); > } > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx