This patch allows userspace to toggle PSR through a debugfs interface. It adds functionality to write 0 or 1 to the existing i915_edp_psr_status file in order to change the relevant module parameter and enable/disable PSR. Previous upstream feedback did not like making it a connector property or putting it in sysfs because that would require API stability going forward. debugfs interfaces do not have this restriction. Signed-off-by: Eric Caruso <ejcaruso@xxxxxxxxxxxx> --- drivers/gpu/drm/i915/i915_debugfs.c | 67 ++++++++++++++++++++++++++++++++++--- 1 file changed, 63 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 74bc89b..c3d9c89 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2224,10 +2224,9 @@ static int i915_llc(struct seq_file *m, void *data) return 0; } -static int i915_edp_psr_status(struct seq_file *m, void *data) +static int i915_edp_psr_status_show(struct seq_file *m, void *data) { - struct drm_info_node *node = m->private; - struct drm_device *dev = node->minor->dev; + struct drm_device *dev = m->private; struct drm_i915_private *dev_priv = dev->dev_private; u32 psrperf = 0; u32 stat[3]; @@ -2288,6 +2287,66 @@ static int i915_edp_psr_status(struct seq_file *m, void *data) return 0; } +static int i915_edp_psr_status_open(struct inode *inode, struct file *file) +{ + struct drm_device *dev = inode->i_private; + + return single_open(file, i915_edp_psr_status_show, dev); +} + +static ssize_t i915_edp_psr_status_write(struct file *file, + const char __user *ubuf, + size_t len, loff_t *offp) +{ + struct seq_file *m = file->private_data; + struct drm_device *dev = m->private; + struct intel_encoder *encoder; + struct intel_dp *intel_dp = NULL; + int ret; + int enable; + char tmp[32]; + + if (len >= sizeof(tmp)) + return -EINVAL; + + if (copy_from_user(tmp, ubuf, len)) + return -EFAULT; + + tmp[len] = '\0'; + + ret = kstrtoint(tmp, 0, &enable); + if (ret || (enable != 0 && enable != 1)) + return -EINVAL; + + i915.enable_psr = enable; + ret = -ENODEV; + + drm_modeset_lock_all(dev); + for_each_intel_encoder(dev, encoder) { + if (encoder->type != INTEL_OUTPUT_EDP) + continue; + + ret = len; + intel_dp = enc_to_intel_dp(&encoder->base); + + if (enable) + intel_psr_enable(intel_dp); + else + intel_psr_disable(intel_dp); + } + drm_modeset_unlock_all(dev); + return ret; +} + +static const struct file_operations i915_edp_psr_status_fops = { + .owner = THIS_MODULE, + .open = i915_edp_psr_status_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, + .write = i915_edp_psr_status_write +}; + static int i915_sink_crc(struct seq_file *m, void *data) { struct drm_info_node *node = m->private; @@ -4663,7 +4722,6 @@ static const struct drm_info_list i915_debugfs_list[] = { {"i915_swizzle_info", i915_swizzle_info, 0}, {"i915_ppgtt_info", i915_ppgtt_info, 0}, {"i915_llc", i915_llc, 0}, - {"i915_edp_psr_status", i915_edp_psr_status, 0}, {"i915_sink_crc_eDP1", i915_sink_crc, 0}, {"i915_energy_uJ", i915_energy_uJ, 0}, {"i915_pc8_status", i915_pc8_status, 0}, @@ -4698,6 +4756,7 @@ static const struct i915_debugfs_files { {"i915_spr_wm_latency", &i915_spr_wm_latency_fops}, {"i915_cur_wm_latency", &i915_cur_wm_latency_fops}, {"i915_fbc_false_color", &i915_fbc_fc_fops}, + {"i915_edp_psr_status", &i915_edp_psr_status_fops}, }; void intel_display_crc_init(struct drm_device *dev) -- 2.1.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx