From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Drop the gen9 checks from the code and issue DP_LINK_RATE_SET whenever the sink reports to support it. Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_dp.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 63c3ef4..28d9249 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1368,14 +1368,15 @@ found: intel_dp->lane_count = lane_count; - intel_dp->link_bw = - drm_dp_link_rate_to_bw_code(supported_rates[clock]); - - if (INTEL_INFO(dev)->gen >= 9 && intel_dp->supported_rates[0]) { + if (intel_dp->num_supported_rates) { + intel_dp->link_bw = 0; intel_dp->rate_select = rate_to_index(supported_rates[clock], intel_dp->supported_rates); - intel_dp->link_bw = 0; + } else { + intel_dp->link_bw = + drm_dp_link_rate_to_bw_code(supported_rates[clock]); + intel_dp->rate_select = 0; } pipe_config->pipe_bpp = bpp; @@ -3489,7 +3490,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp) if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) link_config[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_BW_SET, link_config, 2); - if (INTEL_INFO(dev)->gen >= 9 && intel_dp->supported_rates[0]) + if (intel_dp->num_supported_rates) drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_RATE_SET, &intel_dp->rate_select, 1); -- 2.0.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx