On Wed, Mar 11, 2015 at 02:12:02PM -0700, Jesse Barnes wrote:
> On 03/05/2015 09:37 PM, akash.goel@xxxxxxxxx wrote:
> > From: Akash Goel <akash.goel@xxxxxxxxx>
> >
> > Enable the RPS interrupts programming(enable/disable/reset) for GEN9,
> > as missing changes to enable the RPS support on GEN9 have been added.
> >
> > Signed-off-by: Akash Goel <akash.goel@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 17 +++--------------
> > 1 file changed, 3 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 6273c282..3692837 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -5629,12 +5629,7 @@ static void gen6_suspend_rps(struct drm_device *dev)
> >
> > flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> >
> > - /*
> > - * TODO: disable RPS interrupts on GEN9+ too once RPS support
> > - * is added for it.
> > - */
> > - if (INTEL_INFO(dev)->gen < 9)
> > - gen6_disable_rps_interrupts(dev);
> > + gen6_disable_rps_interrupts(dev);
> > }
> >
> > /**
> > @@ -5692,12 +5687,7 @@ static void intel_gen6_powersave_work(struct work_struct *work)
> >
> > mutex_lock(&dev_priv->rps.hw_lock);
> >
> > - /*
> > - * TODO: reset/enable RPS interrupts on GEN9+ too, once RPS support is
> > - * added for it.
> > - */
> > - if (INTEL_INFO(dev)->gen < 9)
> > - gen6_reset_rps_interrupts(dev);
> > + gen6_reset_rps_interrupts(dev);
> >
> > if (IS_CHERRYVIEW(dev)) {
> > cherryview_enable_rps(dev);
> > @@ -5716,8 +5706,7 @@ static void intel_gen6_powersave_work(struct work_struct *work)
> > }
> > dev_priv->rps.enabled = true;
> >
> > - if (INTEL_INFO(dev)->gen < 9)
> > - gen6_enable_rps_interrupts(dev);
> > + gen6_enable_rps_interrupts(dev);
> >
> > mutex_unlock(&dev_priv->rps.hw_lock);
> >
> >
>
> Reviewed-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx>
Merged the remaining four, thanks for patches&review.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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