On Thu, 26 Feb 2015, Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote: > When we takeover from the BIOS and install our interrupt handler, the > BIOS may have left us a few surprises in the form of spontaneous > interrupts. (This is especially likely on hardware like 965gm where > display fifo underruns are continuous and the GMCH cannot filter that > interrupt souce.) As we enable our IRQ early so that we can use it > during hardware probing, our interrupt handler must be prepared to > handle a few sources prior to being fully configured. As such, we need > to add a simple is-ready check prior to dereferencing our KMS state for > reporting underruns. > > Reported-by: Rob Clark <rclark@xxxxxxxxxx> > Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1193972 "You are not authorized to access bug #1193972. To see this bug, you must first log in to an account with the appropriate permissions." Meh. > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx> > Cc: stable@xxxxxxxxxxxxxxx > --- > drivers/gpu/drm/i915/intel_fifo_underrun.c | 18 +++++++----------- > 1 file changed, 7 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c b/drivers/gpu/drm/i915/intel_fifo_underrun.c > index 04e248dd2259..f2fd992e3cd8 100644 > --- a/drivers/gpu/drm/i915/intel_fifo_underrun.c > +++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c > @@ -282,16 +282,6 @@ bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv, > return ret; > } > > -static bool > -__cpu_fifo_underrun_reporting_enabled(struct drm_i915_private *dev_priv, > - enum pipe pipe) > -{ > - struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > - > - return !intel_crtc->cpu_fifo_underrun_disabled; > -} > - > /** > * intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state > * @dev_priv: i915 device instance > @@ -352,9 +342,15 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv, > void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, > enum pipe pipe) > { > + struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; > + > + /* We may be called too early in init, thanks BIOS! */ > + if (crtc == NULL) > + return; > + > /* GMCH can't disable fifo underruns, filter them. */ > if (HAS_GMCH_DISPLAY(dev_priv->dev) && > - !__cpu_fifo_underrun_reporting_enabled(dev_priv, pipe)) > + !to_intel_crtc(crtc)->cpu_fifo_underrun_disabled) > return; > > if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false)) > -- > 2.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
