From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> To get 4k resolutions to work reliably with the current watermark setup we need to further reduce the drain latency. Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index f43d77c..e262455 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -877,7 +877,7 @@ static uint8_t vlv_compute_drain_latency(struct drm_crtc *crtc, struct intel_crtc *intel_crtc = to_intel_crtc(crtc); int entries, prec_mult, drain_latency, pixel_size; int clock = intel_crtc->config->base.adjusted_mode.crtc_clock; - const int high_precision = IS_CHERRYVIEW(dev) ? 16 : 64; + const int high_precision = IS_CHERRYVIEW(dev) ? 12 : 64; /* * FIXME the plane might have an fb -- 2.0.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
