On Thu, Feb 26, 2015 at 08:46:54PM +0530, deepak.s@xxxxxxxxxxxxxxx wrote: > From: Deepak S <deepak.s@xxxxxxxxxxxxxxx> > > On CHV, PUNIT team confirmed that 'VLV_GFX_CLK_STATUS_BIT' is not a > sticky bit and it will always be set. So ignore Check for previous > Gfx force off during suspend and allow the force clk as part S0ix > Sequence Do we need the force clock at all since we don't do any gunit register save/restore? I tried to peddle a patch to remove it totally in this bug report, but never got any decent answer back: https://bugs.freedesktop.org/show_bug.cgi?id=87086 > > Signed-off-by: Deepak S <deepak.s@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_drv.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 4badb23..b88b7b1 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -1193,11 +1193,13 @@ int vlv_force_gfx_clock(struct drm_i915_private *dev_priv, bool force_on) > int err; > > val = I915_READ(VLV_GTLC_SURVIVABILITY_REG); > - WARN_ON(!!(val & VLV_GFX_CLK_FORCE_ON_BIT) == force_on); > > #define COND (I915_READ(VLV_GTLC_SURVIVABILITY_REG) & VLV_GFX_CLK_STATUS_BIT) > /* Wait for a previous force-off to settle */ > - if (force_on) { > + if (force_on && !IS_CHERRYVIEW(dev_priv->dev)) { > + /* WARN_ON only for the Valleyview */ > + WARN_ON(!!(val & VLV_GFX_CLK_FORCE_ON_BIT) == force_on); > + > err = wait_for(!COND, 20); > if (err) { > DRM_ERROR("timeout waiting for GFX clock force-off (%08x)\n", > -- > 1.9.1 -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
