On Fri, Feb 13, 2015 at 11:48:23AM +0000, John.C.Harrison@xxxxxxxxx wrote:
> From: John Harrison <John.C.Harrison@xxxxxxxxx>
>
> Added explicit creation creation and submission of the request structure to the
> display object pinning code. This removes any reliance on the OLR keeping track
> of the request and the unknown randomness that can ensue with other work
> becoming part of the same request.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 21 ++++++++++++++++++---
> 1 file changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 96f9155..ef561e5 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3938,9 +3938,24 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
> int ret;
>
> if (pipelined != i915_gem_request_get_ring(obj->last_read_req)) {
> - ret = i915_gem_object_sync(obj, pipelined);
> - if (ret)
> - return ret;
> + if (!pipelined) {
> + ret = i915_gem_object_wait_rendering(obj, false);
> + } else {
> + struct drm_i915_private *dev_priv = pipelined->dev->dev_private;
> + struct drm_i915_gem_request *req;
> +
> + ret = dev_priv->gt.alloc_request(pipelined, pipelined->default_context, &req);
> + if (ret)
> + return ret;
> +
> + ret = i915_gem_object_sync(obj, req->ring);
> + if (ret)
> + return ret;
> +
> + ret = i915_add_request_no_flush(req->ring);
> + if (ret)
> + return ret;
> + }
Wrong layer. The only place using pin_and_fence (the caller of this
function) with non-NULL ring is the pageflip code, which also throws other
stuff onto the ring.
-Daniel
> }
>
> /* Mark the pin_display early so that we account for the
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
