On Wed, Feb 18, 2015 at 07:31:11PM +0530, akash.goel@xxxxxxxxx wrote:
> From: Akash Goel <akash.goel@xxxxxxxxx>
>
> On SKL, the frequency programmed in RPNSWREQ (A008) register
> has to be in units of 16.66 MHZ. So updated the gen6_set_rps
> function, as per this change.
>
> Signed-off-by: Akash Goel <akash.goel@xxxxxxxxx>
> Reviewed-by: Lespiau, Damien <damien.lespiau@xxxxxxxxx>
I guess you've manually frobbed with the patch series that git
format-patch has created. Whatever it is, the thing is out-of-order now
and a bit a mess.
Can you please resend without doing that?
Thanks, Daniel
> ---
> drivers/gpu/drm/i915/intel_pm.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index bebefe7..1df3fbd 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3764,7 +3764,10 @@ static void gen6_set_rps(struct drm_device *dev, u8 val)
> if (val != dev_priv->rps.cur_freq) {
> gen6_set_rps_thresholds(dev_priv, val);
>
> - if (IS_HASWELL(dev) || IS_BROADWELL(dev))
> + if (IS_GEN9(dev))
> + I915_WRITE(GEN6_RPNSWREQ,
> + GEN9_FREQUENCY(val * GEN9_FREQ_SCALER));
> + else if (IS_HASWELL(dev) || IS_BROADWELL(dev))
> I915_WRITE(GEN6_RPNSWREQ,
> HSW_FREQUENCY(val));
> else
> --
> 1.9.2
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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