On Mon, Feb 16, 2015 at 03:07:57PM +0530, Vijay Purushothaman wrote: > Changes since version 1: > Addressed Ville's review comments > Decoded the magic numbers as much as possible > Split the single patch into logical patch set > Dropped the DPIO_CLK_EN changes > > > Vijay Purushothaman (5): > drm/i915: Add new PHY reg definitions for lock threshold > drm/i915: Limit max VCO supported in CHV to 6.48GHz > drm/i915: Disable M2 frac division for integer case > drm/i915: Initialize CHV digital lock detect threshold > drm/i915: Update prop, int co-eff and gain threshold for CHV Merged the first two patches from this series to dinq, thanks. -Daniel > > drivers/gpu/drm/i915/i915_reg.h | 11 +++++ > drivers/gpu/drm/i915/intel_display.c | 78 +++++++++++++++++++++++++--------- > 2 files changed, 70 insertions(+), 19 deletions(-) > > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
