On Thu, Feb 05, 2015 at 10:47:24AM +0000, Nick Hoath wrote:
> From: "Hoath, Nicholas" <nicholas.hoath@xxxxxxxxx>
>
> Add:
> WaForceEnableNonCoherent
>
> v1: Don't add WaHdcDisableFetchWhenMasked. Add stepping check for WaForceEnableNonCoherent
>
> Signed-off-by: Nick Hoath <nicholas.hoath@xxxxxxxxx>
Reviewed-by: Damien Lespiau <damien.lespiau@xxxxxxxxx>
--
Damien
> ---
> drivers/gpu/drm/i915/intel_ringbuffer.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 066b63d..36885b4 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -902,6 +902,17 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
> GEN9_ENABLE_YV12_BUGFIX);
> }
>
> + if (INTEL_REVID(dev) <= SKL_D0_REVID) {
> + /*
> + *Use Force Non-Coherent whenever executing a 3D context. This
> + * is a workaround for a possible hang in the unlikely event
> + * a TLB invalidation occurs during a PSD flush.
> + */
> + /* WaForceEnableNonCoherent:skl */
> + WA_SET_BIT_MASKED(HDC_CHICKEN0,
> + HDC_FORCE_NON_COHERENT);
> + }
> +
> /* Wa4x4STCOptimizationDisable:skl */
> WA_SET_BIT_MASKED(CACHE_MODE_1, GEN8_4x4_STC_OPTIMIZATION_DISABLE);
>
> --
> 2.1.1
>
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