On Mon, 2015-01-26 at 11:12 -0800, Rodrigo Vivi wrote:
> On Fri, Dec 5, 2014 at 5:55 AM, Imre Deak <imre.deak@xxxxxxxxx> wrote:
> > On Fri, 2014-12-05 at 15:28 +0200, Imre Deak wrote:
> >> So far we only allowed HSW and BDW to request for the audio power
> >> domain, but it is also needed at least on VLV/CHV. There is no need
> >> for this restriction, since the power domain->power well mapping should
> >> take care of the distinctions between platforms.
> >>
> >> Spotted-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> >> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> >> ---
> >> drivers/gpu/drm/i915/intel_runtime_pm.c | 20 ++++++++++----------
> >> 1 file changed, 10 insertions(+), 10 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> >> index 8a2bd18..58204ab 100644
> >> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> >> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> >> @@ -50,7 +50,7 @@
> >> * present for a given platform.
> >> */
> >>
> >> -static struct i915_power_domains *hsw_pwr;
> >> +static struct i915_power_domains *i915_pwr;
> >>
> >> #define for_each_power_well(i, power_well, domain_mask, power_domains) \
> >> for (i = 0; \
> >> @@ -1098,10 +1098,8 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
> >> */
> >> if (IS_HASWELL(dev_priv->dev)) {
> >> set_power_wells(power_domains, hsw_power_wells);
> >> - hsw_pwr = power_domains;
> >> } else if (IS_BROADWELL(dev_priv->dev)) {
> >> set_power_wells(power_domains, bdw_power_wells);
> >> - hsw_pwr = power_domains;
> >> } else if (IS_CHERRYVIEW(dev_priv->dev)) {
> >> set_power_wells(power_domains, chv_power_wells);
> >> } else if (IS_VALLEYVIEW(dev_priv->dev)) {
> >> @@ -1110,6 +1108,8 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
> >> set_power_wells(power_domains, i9xx_always_on_power_well);
> >> }
> >>
> >> + i915_pwr = power_domains;
> >> +
> >> return 0;
> >> }
> >>
> >> @@ -1146,7 +1146,7 @@ void intel_power_domains_fini(struct drm_i915_private *dev_priv)
> >> * we're going to unload/reload. */
> >> intel_display_set_init_power(dev_priv, true);
> >>
> >> - hsw_pwr = NULL;
> >> + i915_pwr = NULL;
> >> }
> >>
> >> static void intel_power_domains_resume(struct drm_i915_private *dev_priv)
> >> @@ -1360,10 +1360,10 @@ int i915_request_power_well(void)
> >> {
> >> struct drm_i915_private *dev_priv;
> >>
> >> - if (!hsw_pwr)
> >> + if (!i915_pwr)
> >> return -ENODEV;
> >>
> >> - dev_priv = container_of(hsw_pwr, struct drm_i915_private,
> >> + dev_priv = container_of(i915_pwr, struct drm_i915_private,
> >> power_domains);
> >> intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO);
> >> return 0;
> >> @@ -1375,10 +1375,10 @@ int i915_release_power_well(void)
> >> {
> >> struct drm_i915_private *dev_priv;
> >>
> >> - if (!hsw_pwr)
> >> + if (!i915_pwr)
> >> return -ENODEV;
> >>
> >> - dev_priv = container_of(hsw_pwr, struct drm_i915_private,
> >> + dev_priv = container_of(i915_pwr, struct drm_i915_private,
> >> power_domains);
> >> intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO);
> >> return 0;
> >> @@ -1395,10 +1395,10 @@ int i915_get_cdclk_freq(void)
> >> {
> >> struct drm_i915_private *dev_priv;
> >>
> >> - if (!hsw_pwr)
> >> + if (!i915_pwr)
> >> return -ENODEV;
> >
> > Err, we should also WARN and return here for !HAS_DDI. This is used for
> > restoring the audio BCLK M/N values in the HSW/BDW extended mode
> > registers, but there is no corresponding registers on other platforms.
>
> I was getting this patch for collector but this comment confused me.
> Should we expect a v2 or get this?
Rodrigo, this patch can be ignored, since we have already the audio
component code merged. That one solves this problem too.
>
> >
> >>
> >> - dev_priv = container_of(hsw_pwr, struct drm_i915_private,
> >> + dev_priv = container_of(i915_pwr, struct drm_i915_private,
> >> power_domains);
> >>
> >> return intel_ddi_get_cdclk_freq(dev_priv);
> >
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
