On Sun, Jan 11, 2015 at 06:53:32PM -0800, Kenneth Graunke wrote: [snip] > > Jesse had suggested setting it in broadwell_init_clock_gating on January 5th, > and Valtteri tried it on January 7th. He found "no noticeable difference". > I tried it again, and confirmed his result: there was zero performance impact. > > Setting it via an LRI in Mesa did have a performance impact. I reverted my > Mesa patch, and tried setting it here, and it had the same performance impact. > I rebooted between kernels several times to confirm. It works here, but it > doesn't there. > > I'm pretty sure I confirmed the same result with this bit. Feel free to try. > That's okay. I believe you, I just thought you may have known something I didn't. > Perhaps we should move the rest of the per-context bits here instead of > *_init_clock_gating. We should also confirm that the other bits are actually > having an effect. If this is the behavior we're getting, we should absolutely do this. > > I don't know why it works on Haswell, but it does there - the HiZ RAW stall > bit is set via haswell_init_clock_gating, and it's clearly having an impact. > Maybe it has something to do with the golden context, which is new on BDW. > But I'm probably wrong about that. Setting it when a context is active does > seem more reliable... The golden context stuff has been backported to all gens supported hardware contexts and/or execlists, so I don't think it's that. The big difference between the workarounds and init clock gating is the former is done via LRI, and the latter MMIO. (also, the latter is run again on resume, and I don't think the former is). Thinking outloud - what's the default setting for execlists on BDW now? For execlists my plan (when it was my plan to have) had always been to manually set the register in the context image before loading it. We don't do that with the existing code, we use the old ringbuffer style of, hope it preserves the contents. I wonder if that's the distinction between HSW. > > --Ken _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
