Hi, Daniel Vetter <daniel@xxxxxxxx> writes: > Ok, I've merged this one, since that means you at least won't get an > -EINVAL. But you can't yet enable the feature in mesa since it's still > no-opped out. Let's hope that v3 actually starts granting rights (but > please don't encode that in any merge mesa patch before it's official in > the kernel, Dave Airlie _will_ revert it even if it breaks the build) and > that this happens soon. Thanks for merging the patch. The current patch proposed for Mesa only enables the feature if the version is >= 2 *and* it can successfully do a pipeline write to some other register. Checking whether it can write to a register is already used to decide whether to enable some transform feedback extensions and indirect draw calls. I think in that case it should be safe to land the Mesa patches even though it would only work on IvyBridge and not Haswell or Gen8+. If we fix the kernel to allow the write for Haswell too then I think it would magically start working without any extra changes. I'm not really sure if I understand what you're saying about it being no-opped. It's effectively not no-opped on IvyBridge so I think we should already be able to enable the feature. Do you agree? - Neil > -Daniel > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
