On Fri, Dec 19, 2014 at 02:51:56PM +0200, Imre Deak wrote: > GEN8+ HW has the option to route PM interrupts to either the CPU or to > GT. For GEN8 this was already set correctly to routing to CPU, but not > for GEN9, so fix this. Note that when disabling RPS interrupts this was > set already correctly, though in that case it didn't matter much except > for the possibility of spurious interrupts. > > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index a3ebaa8..f1f06d7 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3751,7 +3751,7 @@ static u32 gen6_rps_pm_mask(struct drm_i915_private *dev_priv, u8 val) > if (INTEL_INFO(dev_priv->dev)->gen <= 7 && !IS_HASWELL(dev_priv->dev)) > mask |= GEN6_PM_RP_UP_EI_EXPIRED; > > - if (IS_GEN8(dev_priv->dev)) > + if (INTEL_INFO(dev_priv)->gen >= 8) > mask |= GEN8_PMINTR_REDIRECT_TO_NON_DISP; > > return ~mask; > -- > 1.8.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
