On Wed, Dec 17, 2014 at 08:19:00PM +0200, Ville Syrjälä wrote: > On Wed, Dec 17, 2014 at 04:48:19PM +0000, Chris Wilson wrote: > > On Wed, Dec 17, 2014 at 04:41:42PM +0000, Chris Wilson wrote: > > > On gen2-4, we have a separate pageflip prepare/finish phase. The intent > > > of the stall check is to detect when we have incurred a delay, > > > potentially indefinite, after the pageflip is submitted and before the > > > flip is processed by the hardware. However, our notion of > > > INTEL_FLIP_PENDING/INTEL_FLIP_COMPLETE do not tally with how we set the > > > values during prepare/finish and the current stall check erroneously > > > assumes that when the pending value >= COMPLETE, the driver has seen the > > > hardware completion flag. But what the driver actually means, is that it > > > has seen the acknowlegement that the flip is queued and is now pending > > > the completion event. > > > > Bah, otoh, as we don't mark the flip as pending before completion on > > gen5+, we know don't detect when the flip is wedged there after applying > > this patch. > > > > It is quite possible that the work->pending check is entirely bogus. > > Back to the drawing board. > > We just apply my fix. And then we can even get rid of the whole > prepare/finish mess. I concur. I was trying to see if there was any value in trusting IIR but not ISR for gen2/3, but that's silly. So with the current flip interrupt handling we really do not have the two phases anymore. https://bugs.freedesktop.org/attachment.cgi?id=110912 Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
