From: "Michael H. Nguyen" <michael.h.nguyen@xxxxxxxxx> This is v7 in response to http://lists.freedesktop.org/archives/intel-gfx/2014-December/057033.html Minor updates from the last rev - Keep batch pool in LRU order (Daniel) - Remove duplicate madv assignments (Daniel) Brad Volkin (5): drm/i915: Implement a framework for batch buffer pools drm/i915: Use batch pools with the command parser drm/i915: Use batch length instead of object size in command parser drm/i915: Mark shadow batch buffers as purgeable drm/i915: Tidy up execbuffer command parsing code Documentation/DocBook/drm.tmpl | 5 ++ drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_cmd_parser.c | 99 +++++++++++++++++---- drivers/gpu/drm/i915/i915_debugfs.c | 71 +++++++++++++-- drivers/gpu/drm/i915/i915_dma.c | 1 + drivers/gpu/drm/i915/i915_drv.h | 23 +++++ drivers/gpu/drm/i915/i915_gem.c | 3 + drivers/gpu/drm/i915/i915_gem_batch_pool.c | 137 +++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_gem_execbuffer.c | 98 +++++++++++++++++---- 9 files changed, 396 insertions(+), 42 deletions(-) create mode 100644 drivers/gpu/drm/i915/i915_gem_batch_pool.c -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
