On Wed, Dec 10, 2014 at 10:07:40PM +0530, Gaurav K Singh wrote: > From now on for both DSI Ports A & C, the seq_port value has been > set to 0. seq_port value is parsed from Sequence block#53 of VBT. > So, for packets that needs to be read/write for DSI single link on > Port A and Port C will now be based on the DVO port from VBT block 2, > instead of seq_port. > > Signed-off-by: Gaurav K Singh <gaurav.k.singh@xxxxxxxxx> > Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx> Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
