On Tue, Dec 09, 2014 at 09:28:29PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Add the missing CRC control register value for DP port D on CHV. > Untested as I don't have a CHV machine with DP on port D. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index d74b62d..5620b8f 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -3100,6 +3100,10 @@ static int vlv_pipe_crc_ctl_reg(struct drm_device *dev, > *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_C_VLV; > need_stable_symbols = true; > break; > + case INTEL_PIPE_CRC_SOURCE_DP_D: We need to keep rejecting DP D on vlv. I've added a check for that while merging this patch. -Daniel > + *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_D_VLV; > + need_stable_symbols = true; > + break; > case INTEL_PIPE_CRC_SOURCE_NONE: > *val = 0; > break; > -- > 2.0.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
