From: Deepak S <deepak.s@xxxxxxxxxxxxxxx> According to updated BSpec, Render/Common Wells register range changed. Updating the same to match the spec and avoid extra forcewake for none forcewake range. Signed-off-by: Deepak S <deepak.s@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_uncore.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 46de8d7..dd36f9b 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -647,9 +647,9 @@ void assert_force_wake_inactive(struct drm_i915_private *dev_priv) #define FORCEWAKE_CHV_RENDER_RANGE_OFFSET(reg) \ (REG_RANGE((reg), 0x2000, 0x4000) || \ - REG_RANGE((reg), 0x5000, 0x8000) || \ + REG_RANGE((reg), 0x5200, 0x8000) || \ REG_RANGE((reg), 0x8300, 0x8500) || \ - REG_RANGE((reg), 0xB000, 0xC000) || \ + REG_RANGE((reg), 0xB000, 0xB480) || \ REG_RANGE((reg), 0xE000, 0xE800)) #define FORCEWAKE_CHV_MEDIA_RANGE_OFFSET(reg) \ @@ -665,10 +665,7 @@ void assert_force_wake_inactive(struct drm_i915_private *dev_priv) REG_RANGE((reg), 0x8000, 0x8300) || \ REG_RANGE((reg), 0x8500, 0x8600) || \ REG_RANGE((reg), 0x9000, 0xB000) || \ - REG_RANGE((reg), 0xC000, 0xC800) || \ - REG_RANGE((reg), 0xF000, 0x10000) || \ - REG_RANGE((reg), 0x14000, 0x14400) || \ - REG_RANGE((reg), 0x22000, 0x24000)) + REG_RANGE((reg), 0xF000, 0x10000)) #define FORCEWAKE_GEN9_UNCORE_RANGE_OFFSET(reg) \ REG_RANGE((reg), 0xB00, 0x2000) -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
