DSI Pll1 is used for enabling DSI on Port C. Signed-off-by: Gaurav K Singh <gaurav.k.singh@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_dsi_pll.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c index 8957f10..9b7f6a5 100644 --- a/drivers/gpu/drm/i915/intel_dsi_pll.c +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c @@ -241,9 +241,12 @@ static void vlv_configure_dsi_pll(struct intel_encoder *encoder) return; } - dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL; + if ((intel_dsi->ports == ((1 << PORT_A) | (1 << PORT_C))) || + (intel_dsi->ports == (1 << PORT_A))) + dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL; - if (intel_dsi->dual_link) + if ((intel_dsi->ports == ((1 << PORT_A) | (1 << PORT_C))) || + (intel_dsi->ports == (1 << PORT_C))) dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL; DRM_DEBUG_KMS("dsi pll div %08x, ctrl %08x\n", -- 1.7.9.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx